L2+ Cache

The L2+ Cache product is a level 2 cache that operates at greater efficiencies than traditional L2 caches. This is due to the incorporation of Performance-IP's patent pending Memory Tracker Technology™. This allows the L2+ Cache's hit rates to exceed those of traditional L2 caches of the same size.

The L2+ Cache is Performance-IP's second product based on its patent pending Memory Tracker Technology™ showing again how this technology can improve the efficiency of memory system components.

• Memory Tracker Technology™
• Fully configurable cache size, line size, and number of ways
• Non-Blocking Cache Architecture
• Supports multiple Hit-Under-Miss Operation
• Supports multiple Miss-Under-Miss Operation
• Programmable Allocate-on-Write
• Cache coherency support
• ECC Support for memories
• Supports OCP, AXI3, and AXI4 bus protocols

The Performance-IP Advantage

Memory Request Optimization can dramatically reduce memory read latency. Using the Memory Tracker Technology™ efficiency of your memory sub-system can be improved. Not only will reads to external memory be reduced, but the recovered performance lost can become a reduction in power or an increase in system performance.

This is the Performance-IP Advantage.